It will be appreciated that fuse memory cells are increasingly being used in integrated circuits, in particular in semiconductor memories, such as DRAMs, for example. A fuse memory cell essentially comprises a metal-metal connection having a low contact resistance, which can be interrupted after the actual production process, whereby the contact resistance of the fuse memory cell is increased. The fuse memory cell can thus assume the programming states “conducting” and “non-conducting”, that is to say that it represents either a logic 1 or a logic 0.
The metal-metal connection of a fuse memory cell is interrupted as required either by the application of a current or by the action of a laser beam. Depending on the method by means of which their metal-metal connections can be interrupted, fuse memory cells are referred to as electrical fuse memory cells or as laser fuse memory cells.
Furthermore, so-called antifuse memory cells also exist, in the case of which an electrical connection is not interrupted, rather such a connection is provided after the actual production process for programming purposes. No distinction is made hereinafter between fuse and antifuse memory cells. Instead, the term “fuse memory cells” is understood to mean both types of fuse memory cells.
In the German-language specialist literature the terms “Schmelzbrücken” [“fusible links”], “auftrennbare Schmelzbrücken” [“interruptible fusible links”] or “Sicherungen” [“fuses”] are occasionally used for fuse memory cells. However, even in the German-language specialist literature, the term “Fuse” [fuse”] is significantly more common. Therefore, the text hereinafter will refer to fuse memory cells.
Conventional electrical fuse memory cells have a resistance of 7 kΩ in the case of an interrupted fuse connection and a resistance of 300Ω in the case of an intact fuse connection. The high resistance value of a blown fuse memory cell is obtained by means of a high fusing voltage that is present at the fuse memory cell during the interruption operation. For a high fusing voltage to be applied to the fuse memory cell, the oxide substrate on which the fuse memory cell is situated must have a certain minimum thickness. However, such an oxide thickness is generally not required by the remaining components arranged on the same substrate. Accordingly, high additional costs are associated with a high resistance value of a blown fuse memory cell.
Conventional read-out circuits by means of which the programming state of a fuse memory cell is read out compare the resistance of the fuse memory cell with the resistance of the source-drain path of a MOS transistor arranged in the measurement path. The measured resistance of the fuse memory cell also depends on fluctuations during the production of the transistor.
A further disadvantage of conventional read-out circuits for fuse memory cells is static currents that flow through the fuse connection during the reading of a blown fuse memory cell. In addition to the increased current consumption, these currents also pose a safety problem for the associated circuit.